/[cmucl]/src/code/pmax-disassem.lisp
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Contents of /src/code/pmax-disassem.lisp

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Revision 1.5 - (show annotations)
Sun Feb 11 19:24:50 1990 UTC (24 years, 2 months ago) by ch
Branch: MAIN
Changes since 1.4: +31 -22 lines
Fixed byte-order brain damage for PMAX.

Added disassembly methods for several other pseudo instructions (LOADI, B).
1 ;;; -*- Mode: Lisp; Package: MIPS -*-
2 ;;;
3 ;;; $Header: /tiger/var/lib/cvsroots/cmucl/src/code/pmax-disassem.lisp,v 1.5 1990/02/11 19:24:50 ch Exp $
4 ;;;
5 ;;; A simple dissambler for the MIPS R2000.
6 ;;;
7 ;;; Written by Christopher Hoover.
8 ;;;
9
10 (in-package "MIPS" :use '("LISP"))
11
12
13 ;;;; Instruction Layout
14
15 ;;;
16 ;;; Each instrunction on the MIPS R2000 consists of a single word (32
17 ;;; bits) aligned on a single word boundaray. There are three
18 ;;; instrunction formats:
19 ;;;
20 ;;; I-Type (Immediate)
21 ;;;
22 ;;; 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
23 ;;; 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
24 ;;; ---------------------------------------------------------------
25 ;;; [ op ] [ rs ] [ rt ] [ immediate ]
26 ;;; ---------------------------------------------------------------
27 ;;;
28 ;;;
29 ;;; J-Type (Jump)
30 ;;;
31 ;;; 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
32 ;;; 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
33 ;;; ---------------------------------------------------------------
34 ;;; [ op ] [ target ]
35 ;;; ---------------------------------------------------------------
36 ;;;
37 ;;;
38 ;;; R-Type (Register)
39 ;;;
40 ;;; 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
41 ;;; 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
42 ;;; ---------------------------------------------------------------
43 ;;; [ op ] [ rs ] [ rt ] [ rd ] [ shmat ] [ funct ]
44 ;;; ---------------------------------------------------------------
45 ;;;
46 ;;; These instructions fall into 5 categories: Load/Store,
47 ;;; Computational, Jump/Branch, Coprocessor, and Special.
48 ;;;
49
50
51 ;;;; Register Names
52
53 (defparameter register-name-style :lisp
54 "The register name style: :c, :lisp, :raw")
55
56 (defvar *c-register-names*
57 '#("ZERO" "$AT" "$V0" "$V1" "$A0" "$A1" "$A2" "$A3"
58 "$T0" "$T1" "$T2" "$T3" "$T4" "$T5" "$T6" "$T7"
59 "$S0" "$S1" "$S2" "$S3" "$S4" "$S5" "$S6" "$S7"
60 "$T8" "$T9" "$K0" "$K1" "$GP" "$SP" "$S8" "$RA"))
61
62 (defvar *lisp-register-names*
63 '#("$ZERO" "$LIP" "$NL0" "$NL1" "$NL2" "$NL3" "$NL4" "$NL5/NARGS"
64 "$L0" "$L1" "$L2" "$L3" "$L4" "$L5/ENV" "$L6/OLD-CONT" "$L7/CALL-NAME"
65 "$A0" "$A1" "$A2" "$A3" "$A4" "$A5" "$L14/ARGS" "$L15/LRA"
66 "$BSP" "$CSP" "$K0" "$K1" "$NULL" "$NSP" "$CODE" "$CONT"))
67
68 (defvar *raw-register-names*
69 '#("$R0" "$R1" "$R2" "$R3" "$R4" "$R5" "$R6" "$R7"
70 "$R8" "$R9" "$R10" "$R12" "$R13" "$R14" "$R15"
71 "$R16" "$R17" "$R18" "$R19" "$R20" "$R21" "$R22" "$R23"
72 "$R24" "$R25" "$R26" "$R27" "$R28" "$R29" "$R30" "$R31"))
73
74 (defun register-name (register-number)
75 (unless (<= 0 register-number 31)
76 (error "Illegal register number!"))
77 (let ((register-names (ecase register-name-style
78 (:c *c-register-names*)
79 (:lisp *lisp-register-names*)
80 (:raw *raw-register-names*))))
81 (svref register-names register-number)))
82
83
84 ;;;; Instruction Type Definition
85
86 ;;;
87 ;;; These instruction types correspond to the various ways the decoded
88 ;;; instructions are printed which in turn corresponds somewhat to the
89 ;;; way the instructions are decoded.
90 ;;;
91
92 (defvar *mips-instruction-types* (make-hash-table :test #'eq))
93
94 (defmacro def-mips-instruction-type (types &body body)
95 `(let ((closure #'(lambda (name word stream) ,@body)))
96 (dolist (type ',types)
97 (when (gethash type *mips-instruction-types*)
98 (warn "Instruction type ~S being redefined" type))
99 (setf (gethash type *mips-instruction-types*) closure))))
100
101 (defun mips-instruction-type-p (type)
102 (not (not (gethash type *mips-instruction-types*))))
103
104
105 ;;;; Instruction Types
106
107 ;;;
108 ;;; Used later for relative branches.
109 (defvar *current-instruction-number* 0)
110
111 (def-mips-instruction-type (:ls-type)
112 (let ((rs (ldb (byte 5 21) word))
113 (rt (ldb (byte 5 16) word))
114 (immed (signed-ldb (byte 16 0) word)))
115 (format stream "~16,8T~A~8,8T~A, #x~X(~A)~%"
116 name (register-name rt) immed (register-name rs))))
117
118 (def-mips-instruction-type (:si-type)
119 (let ((rs (ldb (byte 5 21) word))
120 (rt (ldb (byte 5 16) word))
121 (immed (signed-ldb (byte 16 0) word)))
122 (cond ((and (zerop rs) (or (string= name "ADDI") (string= name "ADDIU")))
123 (format stream "~16,8TLOADI~8,8T~A, #x~X~%"
124 (register-name rt) immed))
125 (t
126 (format stream "~16,8T~A~8,8T~A, ~A, #x~X~%"
127 name (register-name rt) (register-name rs) immed)))))
128
129 (def-mips-instruction-type (:ui-type)
130 (let ((rs (ldb (byte 5 21) word))
131 (rt (ldb (byte 5 16) word))
132 (immed (ldb (byte 16 0) word)))
133 (cond ((and (zerop rs) (or (string= name "ORI") (string= name "XORI")))
134 (format stream "~16,8TLOADI~8,8T~A, #x~X~%"
135 (register-name rt) immed))
136 (t
137 (format stream "~16,8T~A~8,8T~A, ~A, #x~X~%"
138 name (register-name rt) (register-name rs) immed)))))
139
140 (def-mips-instruction-type (:lui-type)
141 (let ((rt (ldb (byte 5 16) word))
142 (immed (ldb (byte 16 0) word)))
143 (format stream "~16,8T~A~8,8T~A, #x~X~%" name (register-name rt) immed)))
144
145 (def-mips-instruction-type (:j-type)
146 (let ((target (ldb (byte 26 0) word)))
147 (format stream "~16,8T~A~8,8Ttarget = ~D~%" name target)))
148
149 (def-mips-instruction-type (:jr-type)
150 (let ((rs (ldb (byte 5 21) word)))
151 (format stream "~16,8T~A~8,8T~A~%" name (register-name rs))))
152
153 (def-mips-instruction-type (:jalr-type)
154 (let ((rs (ldb (byte 5 21) word))
155 (rd (ldb (byte 5 11) word)))
156 (format stream "~16,8T~A~8,8T~A, ~A~%" name
157 (register-name rd) (register-name rs))))
158
159 (defun branch-target (offset)
160 (+ *current-instruction-number* offset 1))
161
162 (def-mips-instruction-type (:branch-type)
163 (let ((rs (ldb (byte 5 21) word))
164 (offset (signed-ldb (byte 16 0) word)))
165 (format stream "~16,8T~A~8,8T~A, ~D~%" name
166 (register-name rs) (branch-target offset))))
167
168 (def-mips-instruction-type (:branch2-type)
169 (let* ((rs (ldb (byte 5 21) word))
170 (rt (ldb (byte 5 16) word))
171 (offset (signed-ldb (byte 16 0) word))
172 (target (branch-target offset)))
173 (cond ((and (zerop rs) (zerop rt) (string= name "BEQ"))
174 (format stream "~16,8TB~8,8T~D~%" target))
175 (t
176 (format stream "~16,8T~A~8,8T~A, ~A, ~D~%" name
177 (register-name rs) (register-name rt) target)))))
178
179 (def-mips-instruction-type (:r3-type)
180 (let ((rs (ldb (byte 5 21) word))
181 (rt (ldb (byte 5 16) word))
182 (rd (ldb (byte 5 11) word)))
183 (cond ((zerop rd)
184 ;; Hack for NOP
185 (format stream "~16,8TNOP~%"))
186 ((and (zerop rt) (or (string= name "OR") (string= name "ANDU")))
187 ;; Hack for MOVE
188 (format stream "~16,8TMOVE~8,8T~A, ~A~%"
189 (register-name rd) (register-name rs)))
190 (t
191 (format stream "~16,8T~A~8,8T~A, ~A, ~A~%"
192 name (register-name rd) (register-name rs)
193 (register-name rt))))))
194
195 (def-mips-instruction-type (:mf-type)
196 (let ((rd (ldb (byte 5 11) word)))
197 (format stream "~16,8T~A~8,8T~A~%" name (register-name rd))))
198
199 (def-mips-instruction-type (:mt-type)
200 (let ((rs (ldb (byte 5 21) word)))
201 (format stream "~16,8T~A~8,8T~A~%" name (register-name rs))))
202
203 (def-mips-instruction-type (:mult-type)
204 (let ((rs (ldb (byte 5 21) word))
205 (rt (ldb (byte 5 16) word)))
206 (format stream "~16,8T~A~8,8T~A, ~A~%" name
207 (register-name rs) (register-name rt))))
208
209 (def-mips-instruction-type (:shift-type)
210 (let ((rt (ldb (byte 5 16) word))
211 (rd (ldb (byte 5 11) word))
212 (shamt (ldb (byte 5 6) word)))
213 ;; Hack for NOP
214 (cond ((= word 0)
215 (format stream "~16,8TNOP~%"))
216 (t
217 (format stream "~16,8T~A~8,8T~A, ~A, #x~X~%"
218 name (register-name rd) (register-name rt) shamt)))))
219
220 (def-mips-instruction-type (:shiftv-type)
221 (let ((rs (ldb (byte 5 21) word))
222 (rt (ldb (byte 5 16) word))
223 (rd (ldb (byte 5 11) word)))
224 (format stream "~16,8T~A~8,8T~A, ~A, ~A~%"
225 name (register-name rd) (register-name rt) (register-name rs))))
226
227 (def-mips-instruction-type (:break-type)
228 (let ((code (ldb (byte 20 6) word))) ; sandro's adb uses (byte 10 16)
229 (format stream "~16,8T~A~8,8T#x~X~%" name code)))
230
231 (def-mips-instruction-type (:syscall-type)
232 (declare (ignore word))
233 (format stream "~16,8T~A~%" name))
234
235 (def-mips-instruction-type (:cop0-type :cop1-type :cop2-type :cop3-type)
236 (format stream "~16,8T~A~8,8T(#x~X)~%" name word))
237
238
239 ;;;; Instruction Definition
240
241 (defstruct (mips-instruction
242 (:constructor make-mips-instruction (name type))
243 (:print-function %print-mips-instruction))
244 (name "" :type simple-string)
245 type)
246
247 (defun %print-mips-instruction (instr stream depth)
248 (declare (ignore depth))
249 (format stream "#<MIPS instruction ~A>" (mips-instruction-name instr)))
250
251
252 (defconstant mips-instruction-bits 6)
253
254 (defvar *mips-instructions*
255 (make-array (ash 1 mips-instruction-bits)))
256 (proclaim '(type *mips-instructions* 'simple-vector))
257
258 (defmacro def-mips-instr (name op-code type)
259 `(let ((name ,name)
260 (type ,type))
261 (unless (mips-instruction-type-p type)
262 (warn "~S is an unknown instruction type" type))
263 (setf (svref *mips-instructions* ,op-code)
264 (make-mips-instruction name ,type))
265 name))
266
267
268 (defconstant mips-special-instruction-bits 6)
269
270 (defvar *mips-special-instructions*
271 (make-array (ash 1 mips-special-instruction-bits)))
272 (proclaim '(type *mips-special-instructions* 'simple-vector))
273
274 (defmacro def-mips-special-instr (name op-code type)
275 `(let ((name ,name)
276 (type ,type))
277 (unless (mips-instruction-type-p type)
278 (warn "~S is an unknown instruction type" type))
279 (setf (svref *mips-special-instructions* ,op-code)
280 (make-mips-instruction name ,type))
281 name))
282
283
284 (defconstant mips-bcond-instruction-bits 6)
285
286 (defvar *mips-bcond-instructions*
287 (make-array (ash 1 mips-bcond-instruction-bits)))
288 (proclaim '(type *mips-bcond-instructions* 'simple-vector))
289
290 (defmacro def-mips-bcond-instr (name op-code type)
291 `(let ((name ,name)
292 (type ,type))
293 (unless (mips-instruction-type-p type)
294 (warn "~S is an unknown instruction type" type))
295 (setf (svref *mips-bcond-instructions* ,op-code)
296 (make-mips-instruction name ,type))
297 name))
298
299
300 ;;;; Normal Opcodes
301
302 (def-mips-instr "J" #b000010 :j-type)
303 (def-mips-instr "JAL" #b000011 :j-type)
304 (def-mips-instr "BEQ" #b000100 :branch2-type)
305 (def-mips-instr "BNE" #b000101 :branch2-type)
306 (def-mips-instr "BLEZ" #b000110 :branch-type)
307 (def-mips-instr "BGTZ" #b000111 :branch-type)
308
309 (def-mips-instr "ADDI" #b001000 :si-type)
310 (def-mips-instr "ADDIU" #b001001 :si-type)
311 (def-mips-instr "SLTI" #b001010 :si-type)
312 (def-mips-instr "SLTIU" #b001011 :si-type)
313 (def-mips-instr "ANDI" #b001100 :ui-type)
314 (def-mips-instr "ORI" #b001101 :ui-type)
315 (def-mips-instr "XORI" #b001110 :ui-type)
316 (def-mips-instr "LUI" #b001111 :lui-type)
317
318 (def-mips-instr "COP0" #b010000 :cop0-type)
319 (def-mips-instr "COP1" #b010001 :cop1-type)
320 (def-mips-instr "COP2" #b010010 :cop2-type)
321 (def-mips-instr "COP3" #b010011 :cop3-type)
322
323 (def-mips-instr "LB" #b100000 :ls-type)
324 (def-mips-instr "LH" #b100001 :ls-type)
325 (def-mips-instr "LWL" #b100010 :ls-type)
326 (def-mips-instr "LW" #b100011 :ls-type)
327 (def-mips-instr "LBU" #b100100 :ls-type)
328 (def-mips-instr "LHU" #b100101 :ls-type)
329 (def-mips-instr "LWR" #b100110 :ls-type)
330
331 (def-mips-instr "SB" #b101000 :ls-type)
332 (def-mips-instr "SH" #b101001 :ls-type)
333 (def-mips-instr "SWL" #b101010 :ls-type)
334 (def-mips-instr "SW" #b101011 :ls-type)
335 (def-mips-instr "SWR" #b101110 :ls-type)
336
337 (def-mips-instr "LWC0" #b110000 :cop0-type)
338 (def-mips-instr "LWC1" #b110001 :cop1-type)
339 (def-mips-instr "LWC2" #b110010 :cop2-type)
340 (def-mips-instr "LWC3" #b110011 :cop3-type)
341
342 (def-mips-instr "SWC0" #b111000 :cop0-type)
343 (def-mips-instr "SWC1" #b111001 :cop1-type)
344 (def-mips-instr "SWC2" #b111010 :cop2-type)
345 (def-mips-instr "SWC3" #b111011 :cop3-type)
346
347
348 ;;;; SPECIAL Opcodes
349
350 (defconstant special-op #b000000)
351
352 (def-mips-special-instr "SLL" #b000000 :shift-type)
353 (def-mips-special-instr "SRL" #b000010 :shift-type)
354 (def-mips-special-instr "SRA" #b000011 :shift-type)
355 (def-mips-special-instr "SLLV" #b000100 :shiftv-type)
356 (def-mips-special-instr "SRLV" #b000110 :shiftv-type)
357 (def-mips-special-instr "SRAV" #b000111 :shiftv-type)
358
359 (def-mips-special-instr "JR" #b001000 :jr-type)
360 (def-mips-special-instr "JALR" #b001001 :jalr-type)
361 (def-mips-special-instr "SYSCALL" #b001100 :syscall-type)
362 (def-mips-special-instr "BREAK" #b001101 :break-type)
363
364 (def-mips-special-instr "MFHI" #b010000 :mf-type)
365 (def-mips-special-instr "MTHI" #b010001 :mt-type)
366 (def-mips-special-instr "MFLO" #b010010 :mf-type)
367 (def-mips-special-instr "MTLO" #b010011 :mt-type)
368
369 (def-mips-special-instr "MULT" #b011000 :mult-type)
370 (def-mips-special-instr "MULTU" #b011001 :mult-type)
371 (def-mips-special-instr "DIV" #b011010 :mult-type)
372 (def-mips-special-instr "DIVU" #b011011 :mult-type)
373
374 (def-mips-special-instr "ADD" #b100000 :r3-type)
375 (def-mips-special-instr "ADDU" #b100001 :r3-type)
376 (def-mips-special-instr "SUB" #b100010 :r3-type)
377 (def-mips-special-instr "SUBU" #b100011 :r3-type)
378 (def-mips-special-instr "AND" #b100100 :r3-type)
379 (def-mips-special-instr "OR" #b100101 :r3-type)
380 (def-mips-special-instr "XOR" #b100110 :r3-type)
381 (def-mips-special-instr "NOR" #b100111 :r3-type)
382
383 (def-mips-special-instr "SLT" #b101010 :r3-type)
384 (def-mips-special-instr "SLTU" #b101011 :r3-type)
385
386
387 ;;;; BCOND Opcodes
388
389 (defconstant bcond-op #b000001)
390
391 (def-mips-bcond-instr "BLTZ" #b00000 :branch-type)
392 (def-mips-bcond-instr "BLTZAL" #b00001 :branch-type)
393
394 (def-mips-bcond-instr "BLTZAL" #b10000 :branch-type)
395 (def-mips-bcond-instr "BGEZAL" #b10001 :branch-type)
396
397
398 ;;;; Signed-Ldb
399
400 (defun signed-ldb (byte-spec integer)
401 (let ((unsigned (ldb byte-spec integer))
402 (length (byte-size byte-spec)))
403 (if (logbitp (1- length) unsigned)
404 (- unsigned (ash 1 length))
405 unsigned)))
406
407
408 ;;;; Instruction Decoding
409
410 (defun mips-instruction (word)
411 (let* ((opcode (ldb (byte 6 26) word)))
412 (cond ((= opcode special-op)
413 (let ((function (ldb (byte 6 0) word)))
414 (svref *mips-special-instructions* function)))
415 ((= opcode bcond-op)
416 (let ((cond (ldb (byte 5 16) word)))
417 (svref *mips-bcond-instructions* cond)))
418 (t
419 (svref *mips-instructions* opcode)))))
420
421
422 ;;;; Disassemble-Instruction
423
424 (defun disassemble-instruction (word &optional (stream t))
425 (let* ((instr (mips-instruction word)))
426 (unless instr
427 (format stream "UNKNOWN INSTR (#x~X)~%" word)
428 (return-from disassemble-instruction (values nil nil)))
429 (let* ((instr-name (mips-instruction-name instr))
430 (instr-type (mips-instruction-type instr))
431 (closure (gethash instr-type *mips-instruction-types*)))
432 (cond (closure
433 (funcall closure instr-name word stream))
434 (t
435 (format stream "UNKNOWN TYPE (~A/~S/#x~X)~%"
436 instr-name instr-type word)))
437 (values instr-name instr-type))))
438
439
440 ;;; Dissassemble-Code-Vector
441
442 (defconstant delay-slot-instruction-types
443 '(:j-type :jr-type :jalr-type :branch-type :branch2-type))
444
445 (defun disassemble-code-vector (code-vector length &optional (stream t))
446 (do ((i 0 (+ i 4))
447 (*current-instruction-number* 0 (1+ *current-instruction-number*))
448 (instruction-in-delay-slot-p nil))
449 ((>= i length))
450 (unless instruction-in-delay-slot-p
451 (format stream "~6D:" *current-instruction-number*))
452 (multiple-value-bind
453 (name type)
454 (disassemble-instruction (logior (aref code-vector i)
455 (ash (aref code-vector (+ i 1)) 8)
456 (ash (aref code-vector (+ i 2)) 16)
457 (ash (aref code-vector (+ i 3)) 24))
458 stream)
459 (declare (ignore name))
460 (cond ((member type delay-slot-instruction-types :test #'eq)
461 (setf instruction-in-delay-slot-p t))
462 (t
463 (setf instruction-in-delay-slot-p nil))))))

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