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Log of /src/bootfiles/20a/boot-2010-06-cross-x86.lisp

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Revision 1.2 - (view) (annotate) - [select for diffs]
Tue Jun 29 15:37:11 2010 UTC (3 years, 9 months ago) by rtoy
Branch: MAIN
CVS Tags: GIT-CONVERSION, HEAD, RELEASE_20b, cross-sol-x86-2010-12-20, cross-sol-x86-base, cross-sol-x86-merged, cross-sparc-branch-base, release-20b-pre1, release-20b-pre2, snapshot-2010-07, snapshot-2010-08, snapshot-2010-11, snapshot-2010-12, snapshot-2011-01, snapshot-2011-02, snapshot-2011-03, snapshot-2011-04, snapshot-2011-06, snapshot-2011-07, snapshot-2011-09, sparc-tramp-assem-2010-07-19, sparc-tramp-assem-base
Branch point for: RELEASE-20B-BRANCH, cross-sol-x86-branch, cross-sparc-branch, sparc-tramp-assem-branch
Changes since 1.1: +3 -0 lines
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Revision 1.1 - (view) (annotate) - [select for diffs]
Tue Jun 22 15:35:23 2010 UTC (3 years, 9 months ago) by rtoy
Branch: MAIN
Revert the previous change to fix debug:arg/trace issue.  Instead, use
Carl's suggestion and define new SC numbers for the xmm registers
instead of overloading the x87 fpu registers and the xmm register

o New file needed for cross-compiling this change.

o Revert previous change.

o Use xmm0-tn instead of fr0-tn.  No functional change, but makes the
  code more readable.

o Increase the number of float registers from 8 to 16 (8 more for SSE2
o Define new xmm<n> registers
o Update the locations with the new sse2 SC locations for single-reg,
  double-reg, double-double-reg, complex-single-reg,
  complex-double-reg, and complex-double-double-reg storage classes.

o Revert previous change.
o Update os_sigcontext_fpu_reg to support the xmm registers.

o Update os_sigcontext_fpu_reg to support the xmm registers.

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