| Commit | Line | Data |
|---|---|---|
| eeab7066 RT |
1 | /* |
| 2 | ||
| 3 | This code was written as part of the CMU Common Lisp project at | |
| 4 | Carnegie Mellon University, and has been placed in the public domain. | |
| 5 | ||
| 6 | */ | |
| 5ced0fdf | 7 | |
| e67c0397 | 8 | #ifndef _X86_LISPREGS_H_ |
| 9 | #define _X86_LISPREGS_H_ | |
| 10 | ||
| 5ced0fdf | 11 | /* These register names and offsets correspond to definitions |
| 12 | * in compiler/x86/vm.lisp. They map into accessors in the | |
| 13 | * os dependent <machine/signal.h> structure via the sc_reg | |
| 14 | * os dependent function. | |
| 15 | */ | |
| 16 | ||
| 17 | #define NREGS (8) | |
| 18 | ||
| 19 | #ifdef LANGUAGE_ASSEMBLY | |
| 20 | #define REG(num) $ ## num | |
| 21 | #else | |
| 22 | #define REG(num) num | |
| 23 | #endif | |
| 24 | ||
| 25 | #define reg_EAX REG( 0) | |
| 26 | #define reg_ECX REG( 2) | |
| 27 | #define reg_EDX REG( 4) | |
| 28 | #define reg_EBX REG( 6) | |
| 29 | #define reg_ESP REG( 8) | |
| 30 | #define reg_EBP REG(10) | |
| 31 | #define reg_ESI REG(12) | |
| 32 | #define reg_EDI REG(14) | |
| 33 | ||
| 34 | #define reg_SP reg_ESP | |
| 35 | #define reg_FP reg_EBP | |
| 3e4590e7 | 36 | #define reg_NARGS reg_ECX |
| 5ced0fdf | 37 | |
| 38 | #define REGNAMES "EAX", "ECX", "EDX", "EBX", "ESP", "EBP", "ESI", "EDI" | |
| 39 | ||
| 40 | /* These registers can contain lisp object pointers */ | |
| 41 | #define BOXED_REGISTERS {\ | |
| 42 | reg_EAX, reg_ECX, reg_EDX, reg_EBX, reg_ESI, reg_EDI \ | |
| 43 | } | |
| 44 | ||
| 45 | /* N is offset in storage class (SC) as defined in vm.lisp. | |
| 46 | * Ordering in sigcontext is probably os dependent so let | |
| 47 | * xxx-os.c handle it. | |
| 48 | */ | |
| 49 | ||
| 9495c516 | 50 | #define SC_REG(scp, offset) (*os_sigcontext_reg(scp, offset)) |
| 51 | #define SC_PC(scp) (*os_sigcontext_pc(scp)) | |
| 52 | #define SC_SP(scp) SC_REG(scp, reg_ESP) | |
| 5d2cd5df | 53 | |
| 9495c516 | 54 | #if defined(DARWIN) |
| c2e1d8a6 | 55 | #if __DARWIN_UNIX03 |
| 56 | /* For 10.5 */ | |
| 5c6f325d | 57 | #define SC_EFLAGS(sc) ((sc)->uc_mcontext->__ss.__eflags) |
| c2e1d8a6 | 58 | #else |
| 59 | /* For 10.4 */ | |
| 60 | #define SC_EFLAGS(sc) ((sc)->uc_mcontext->ss.eflags) | |
| 61 | #endif | |
| fc68eb3d | 62 | #elif defined(__linux__) |
| 5c6f325d | 63 | #define SC_EFLAGS(sc) ((sc)->uc_mcontext.gregs[REG_EFL]) |
| 78eb5a7b | 64 | #elif defined(__NetBSD__) |
| 65 | #define SC_EFLAGS(sc) ((sc)->uc_mcontext.__gregs[_REG_EFL]) | |
| 0cb64db4 | 66 | #elif defined(SOLARIS) |
| 67 | /* | |
| 68 | * Solaris/x86 has access the the eflags value, but this doesn't | |
| 89f16dfc | 69 | * currently work. It seems that when we set the EFLAG to enable |
| 70 | * single-stepping, we never actually step the new instruction but we | |
| 71 | * stop at exactly the same place. This is not how it works on other | |
| 72 | * OSes where we do step an instruction. I (rtoy) do not know why. | |
| 73 | * Some more work needs to be done in x86-arch.c to make this work. | |
| 74 | * But the default code there works fine on Solaris/x86. | |
| 0cb64db4 | 75 | */ |
| 76 | /* #define SC_EFLAGS(sc) ((sc)->uc_mcontext.gregs[EFL])*/ | |
| 5d2cd5df | 77 | #endif |
| 5ced0fdf | 78 | |
| e67c0397 | 79 | #endif /* _X86_LISPREGS_H_ */ |